Track My Order
Frequently Asked Questions
International Shipping Info
Mon-Fri, 9am to 12pm and
1pm to 5pm U.S. Mountain Time:
Chat With Us
October 8, 2011
Just a gerybeard hacker…
UNIX Engineer, part time FPGA hacker
C, C++, VHDL, PHP, PL/1, COBOL, Clipper, Visual Basic, Perl, Awk, ksh, TCL/TK…
about 3 years ago
The pin mapping for use with the Papilio One and Papilio Pro can be found on http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing
News - So You Want to Learn FPGA…
about 3 years ago
Perhaps you want to do high-speed digital data acquisition (100MHz+), or DSP filtering of RF signals, or maybe extracting audio from HDMI streams, or how about processing 1080p video streams in real time, or processing raw video from cameras for embedded vision, or controlling 64 servos in real time, or filter a 3Mb/s S/PDIF stream.
The low latency (measured in nanoseconds) and ease of interfacing allow FPGAs to do things that can not be done with CPUs, even when running a real time OS.
If you want to learn how to design using FPGAs you could always have a crack at my informal FPGA course - http://hamsterworks.co.nz/mediawiki/index.php/FPGA_course. The learning curve is still quite steep - “Programming without loops? WTF!”, however it is a lot less steep than doing it alone.
You have to remember you are trying to make something useful out of half a million logic gates, and have it all work at tens or hundreds of megahertz. That would take the resources of a large company in the 80’s or 90’s….
You can also find some of my tinkering at http://hamsterworks.co.nz/mediawiki/index.php/FPGA_Projects
about 5 years ago
I’ve got an old arcade game from fpgaarcade.com running on a Papilio and use it as a screen saver (powered over standby power from the USB) - left on 24x7 with no issues, so a complex design at modest frequencies uses well under 500mA.
However the regulator does get noticeable warm if I use it to drive all the segments of 4xSevenSeg and 8 LEDs at an eye-burningly bright 100% - but with maybe an extra 200mA of load it is pretty much what I would expect.
Here’s my trick - get four 40 pin header strips (code PRT-00116) and use them to hold all the headers in place while you solder them. You could get away with one or two strips, but with four you can hold all the headers in place at the same time.
Your headers will be perfectly aligned and you can then use the pins to attack your projects to the Papilio.
If anybody is looking for an intro to using Xilinx FPGAs with VHDL (I’m outside of the US, so I use VHDL…) have a look at
It uses the same chip as on this board, and it will soon updated soon to include the Papilio One once Gadget Factory release the LogicStart MegaWing.
No public wish lists :(
Forgot your password?
No account? Register one!