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Member Since: September 5, 2013

Country: United States

  • Thank you, thank you, thank you; Pete! Just what I was looking for -and unable to find anywhere else on the web.

    And you managed to pack 10 years of super-dry material into 30 minutes of entertaining geeky fun :) I tend to remember things much better when presented that way.

    Some areas that I wished for more coverage:

    • through holes (via) placement optimization and minimization (on 2 layer boards); Eagle router loves to shuffle through holes in between high current sot-23 MOSFETs
    • through holes (via) in general - especially when dealing with high current path (i.e. will a peak 2 amp flow blow a through hole?)
    • non Vcc/GND copper pour areas - huh?
    • wisdom/fallacy of routing heavy GND/VCC paths around edge of board
    • sensible QA or test points - how?

No public wish lists :(