SuzyQable - ChromeOS Debug Cable

The SuzyQable allows developers, hobbyists, and others to quickly access debugging, recovery, and developer features exposed through some of the USB-C ports on ChromeOS and other Google devices. To be honest with everyone interested in picking up this cable: is not for the average developer and is recommended for advanced users and professionals.

Internally, the SuzyQable has a 2-port USB hub, and a Rp1A5+RpUSB on the CC pins to activate debug mode. One USB port goes to D+/D-, the other USB port goes to SBU1+SBU2. When you attach it to a supporting port, Google devices enable a USB port on SBU which exposes a bunch of endpoints, including UART (accessible with standard serial drivers) for both the embedded controller and Linux consoles, and, depending on the state of your system, a way to flash firmware using the open-source servod software and flashrom.

Basically, the SuzyQable is designed to replace ServoV2 for the most common use-cases, and uses the same software (unless you just want terminal access, in which case you don't need any software).The USB device the cable talks to gets updates with ChromeOS, so features will be added or changed as development continues.

All ChromeOS devices moving forwards will support this cable, starting with the Acer C101 and Pixelbook. You can find a list of supported devices here or in the Documents tab above.

SuzyQable - ChromeOS Debug Cable Product Help and Resources

Connector Basics

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Connectors are a major source of confusion for people just beginning electronics. The number of different options, terms, and names of connectors can make selecting one, or finding the one you need, daunting. This article will help you get a jump on the world of connectors.

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Customer Reviews

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Does what it’s supposed to do, no problems.

Where’d they get that name from?

Not all Chromebooks, and not all SuzyQables, meet the Specs

Users should be aware that not all "Chromebook" appliances follow the rules, and some will actually be missing parts necessary for full use of the USB Type-C "Debug Accessory Mode" enabled with the SuzyQable. Of course, this has nothing to do with the SuzyQable itself.

As case in point, the Samsung Chromebook 4, model XE310XBA-K01US, both does not provide the SPI bus multiplexer chip, shown in presentations about the H1B2C Google Security Chip - instead providing only a simple "Wired-OR" bus - and then is missing the group of four series resistors of the basic 4-wire SPI bus, connecting the H1B2C Google Security Chip to the GigaDevice 25LQ128D boot flash memory device, along with the Gemini Lake SoC "AP". Consequently, the memory device Serial-Out line always appears to the GSC to be in the pulled-up high state, and the GSC only sees all 1's. Only the Gemini Lake SoC SPI bus is actually connected to the boot flash device. The simplest solution for this case is to solder-bridge the pads for these 0402 size resistors, which then allows Closed Case Debugging to function as expected. Otherwise, the GSC, the SoC "Application Processor", and the "Embedded Controller" debug consoles will operate, but it will not be possible to read or write the boot flash memory device using the SuzyQable. Annoyingly, then, it is still possible to erase the boot flash memory using the AP SPI bus, but then, not be able to again boot the AP, and not be able to re-program the boot flash memory with the SuzyQable.

If you suspect this kind of problem, Samsung Customer Support will be worse than useless. Instead, contact Google ChromeOS engineering, who has access to electrical schematics for the various Chromebook Reference Designs.

Also note that the SuzyQable presents itself as a 5.0 Volt 1.5 Ampere Source "Debug and Test System", with a nominal 22kΩ pull-up resistor on CC/CC1 and a 56kΩ pull-up resistor on Vconn/CC2. Unfortunately, while the SuzyQable CC/CC1 pull-up is the correct 22kΩ, the Vconn/CC2 pull-up is, in fact, only 45.3kΩ, in violation of the "USB Type-C Cable and Connector Specification, Release 1.3". In particular, the specification requires that "For Rp when implemented in the USB Type-C plug on a USB Type-C to USB 3.1 Standard-A Cable Assembly, a USB Type-C to USB 2.0 Standard-A Cable Assembly, a USB Type-C to USB 2.0 Micro-B Receptacle Adapter Assembly or a USB Type-C captive cable connected to a USB host, a value of 56 kΩ ± 5% shall be used, in order to provide tolerance to IR drop on VBUS and GND in the cable assembly." 56kΩ ± 5% means between 53.2kΩ and 58.8kΩ. 45.3kΩ is not within this range, let alone the within the ± 1% range specifically shown in the electrical schematic advertised for the SuzyQable. You may want to find a USB Type-C breakout board and check the values for the CC/CC1 and Vconn/CC2 pull-up resistors in your SuzyQable.

As it is, the nominal potential, as seen at the Sink's CC2 pin, given a 1.5A and 5.0V Source, will be (5.1/(45.3+5.1)*5.0V)=0.506V, which is well within the allowed range of values for the "Default USB Power" potential required at CC2, given as being between 0.25V and 0.61V. Any potential above 0.66V at the Sink's CC2 pin, from a pull-up resistor any less than 33.5kΩ, may cause problems.