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External IO and Metastability with FPGA

A new tutorial shows us why external signals can cause metastability and how to use constraint files to manage them

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If you’ve gone through the first couple Alchitry FPGA tutorials, you may have been wondering how the inputs and outputs of the top-level module know where to connect on the board. What about the LED name tells the tools what pin on the FPGA to use? Well, wonder no more! In this week's tutorial we're going to explain the basics of constraint files and dive into some of the dangers of using external signals in your designs.

External IO and Metastability

July 30, 2020

Why external signals can cause metastability and how to use constraint files to manage this

This tutorial is primarily conceptual and a bit advanced, even by FPGA standards, so if you are looking to build a base to start using FPGAs, we recommend checking out the tutorials in the link below before continuing.

 

FPGA chip

 


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